Introduction
When working with AMD/Xilinx FPGAs and SoC families (Zynq-7000, Zynq UltraScale+ MPSoC, Versal), developers frequently ask: Do I need the full Vivado IDE to package, sign, or header-stamp binary packages? Or can I use standalone command-line tools?
This article clarifies the distinction between design synthesis/routing in Vivado and binary image processing, signing, and header injection using standalone CLI binaries such as Bootgen, u-boot-tools, and custom scripting.
1. Vivado vs. Standalone Utilities
It is helpful to separate the FPGA workflow into two distinct phases: Hardware Synthesis/Place & Route and Firmware/Boot Image Packaging.
| Task | Tool Required | Can Run Standalone / Headless? |
|---|---|---|
| HDL Synthesis & Bitstream Generation | Vivado (Vivado Synth / Implementation) | Yes (Tcl scripts / `vivado -mode batch`) |
| Bitstream to Binary conversion (.bit to .bin) | Bootgen or Vivado Tcl (`write_cfgmem`) | Yes (`bootgen` CLI binary) |
| Signing & RSA/ECDSA Authentication | Bootgen CLI | Yes (`bootgen` CLI binary) |
| AES Encryption & Key Management | Bootgen CLI | Yes (`bootgen` CLI binary) |
| Boot Container Generation (BOOT.BIN / PDI) | Bootgen CLI / Petalinux / Yocto | Yes (`bootgen` CLI binary) |
| Runtime FPGA Loading in Linux | Linux FPGA Manager (`fpgautil`) | Yes (No Vivado required on target) |
2. Understanding File Formats: .bit vs .bin vs BOOT.BIN
Xilinx FPGA workflows deal with several distinct binary file formats:
- .bit (Standard Bitstream): Generated by Vivado Implementation. Contains a human-readable header ASCII metadata block (design name, target chip, build date/time) followed by raw configuration frames and sync words (`0xAA995566`).
- .bin (Raw Configuration Binary): The `.bit` payload stripped of the ASCII header. Ideal for raw flash memory or direct SPI/JTAG programmers.
- BOOT.BIN / PDI (Boot Image Container): A multi-partition boot container used by Zynq/Versal SoCs. Combines First Stage Boot Loader (FSBL), FPGA bitstream, ARM Trusted Firmware (ATF), U-Boot, and signature/header metadata.
3. Using Bootgen to Prepare Headers, Sign, and Encrypt
Bootgen is the official AMD/Xilinx command-line executable used to assemble `BOOT.BIN` files, calculate header checksums, attach digital signatures, and encrypt payloads. You do not need to launch the Vivado GUI to run Bootgen.
Sample Boot Image Format (.bif) File:
// image_config.bif
the_ROM_image:
{
[keysrc_encryption] bbram_red_key
[bootloader, authentication=rsa] fsbl.elf
[destination_device=fpga, authentication=rsa, presign=fpga_bitstream.sha384.sig] fpga_bitstream.bit
[authentication=rsa] u-boot.elf
}
Executing Bootgen from the Terminal:
# Generate BOOT.BIN with RSA-2048/3072 signature headers
bootgen -image image_config.bif -arch zynqmp -o BOOT.BIN -w on
# Convert a raw .bit file to a clean headerless .bin file
bootgen -image bit_to_bin.bif -arch zynqmp -process_bitstream bin
4. Alternatives to Vivado & Bootgen
If you are deploying in automated CI/CD environments or minimal embedded Linux targets where installing multi-gigabyte Xilinx tools is impractical, consider these alternatives:
- u-boot-tools (`mkimage`): Used widely in embedded Linux. Packages bitstreams into U-Boot FIT images (`.itb`) with cryptographic signatures (RSA/ECDSA) handled by OpenSSL without needing Vivado.
mkimage -f fit_image.its -k /keys/boot_keys -r fitImage - Linux FPGA Manager (`fpgautil`): Built into Linux kernels for Zynq/ZynqMP. Allows loading bitstreams dynamically at runtime via `/sys/class/fpga_manager` or `fpgautil`:
fpgautil -b fpga_firmware.bit.bin -o overlay.dtbo - Custom Python/C Scripting: For simple custom microcontrollers or MCU-to-FPGA loaders, a simple Python script can parse the `.bit` header, extract the sync word byte offset, calculate CRC32/SHA256, and prepend your own target protocol headers.
Summary
- Vivado is only necessary when compiling HDL (VHDL/Verilog) into bitstreams.
- To sign, encrypt, attach boot headers, or package binaries, use the standalone `bootgen` CLI binary or `mkimage`.
- To program or sign images on Linux host/embedded targets, lightweight open-source tools (`u-boot-tools`, `fpgautil`, Python scripts) are fully capable alternatives.